Double-data-rate architecture; two data transfers per clock cycle Data rate = 200, 266, 333, 400 Mbs Package:
* 66pin TSOP II package 2.5V ±0.2V core power supply 2.5.

The 2x32Mx16 (1Gb) DDR SDRAM is a high-speed CMOS, dynamic random-access, memory using 2 chips containing 536,870,912 bits. Each chip is internally configured as a quad-bank DRAM. The 2x32Mx16 DDR SDRAM uses a double data rate ar chi tec ture to achi.

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